
#line 1 "..\User\source\Hardware\LIN.c" /0








 
  
#line 1 "..\User\include\LIN.h" /0








 
 
 
 
 
  
#line 1 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_Type.h" /0
 





 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 typedef unsigned char                   uint8;
 typedef unsigned short                  uint16;
 typedef unsigned long                   uint32;
 typedef long                            int32;
 typedef short                           int16;
 typedef char                            int8;
 
 
 typedef enum{DISABLE = 0, ENABLE}       ebool;
 
 
#line 14 "..\User\include\LIN.h" /0
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 typedef struct
 {
 uint8 Falg;         
 uint16 Time;        
 } Safety_Verification;  
 
 
 typedef struct
 {
 uint8 NAD;   
 uint8 PCI;   
 uint8 SID;   
 uint8 DIDH;  
 uint8 DIDL;  
 uint8 DATA[12];
 uint8 Pack;   
 uint8 Reply;  
 } LIN_Diagnosis;
 
 
 
 extern Safety_Verification Safety;  
 
 
 typedef uint8 eType_LIN_IRQ;
 typedef uint8 eType_LIN_CHKMOD;
 typedef uint8 eType_LIN_LINRW;
 typedef uint8 eType_LIN_AUTOSIZE;
 typedef uint8 eType_LIN_LINEN;
 
 extern uint8 xdata ucaLinBuff[8];
 
 
 extern void SetIRQ_LIN(ebool eIRQ, eType_LIN_IRQ eIP);               
 
 
 extern void Verify_Mode_Configuration(eType_LIN_CHKMOD eCHKMOD);     
 
 
 extern void Choose_LINRW(eType_LIN_LINRW eLINRW);                    
 
 
 extern void Using_AUTOSIZE(eType_LIN_AUTOSIZE eAUTOSIZE);            
 
 
 extern void LINEN_Control(eType_LIN_LINEN eLINEN);                   
 extern ebool LIN_Enable_Check(void);                                 
 
 
 extern void LIN_Init(void);                                          
 
 
 extern ebool LINREQ_Check(void);                                     
 extern void Perform_LINREQ(void);                                    
 extern void set_LIN_Data_Length(uint8 eLength);                      
 extern void Sleep_Order_2Type_ID_0X1F(void);                         
 
 
 extern ebool Transfer_Complete_Check(void);                          
 
 
 extern ebool LIN_Error_Check(void);                                  
 extern ebool Sync_Error_Check(void);                                 
 extern ebool Data_Error_Check(void);                                 
 extern ebool ID_Error_Check(void);                                   
 extern void LIN_Error_Handing(void);                                 
 
 
 extern ebool Bus_Time_Check(void);                                   
 
 
 extern ebool LIN_Sleep_Check(void);                                  
 extern ebool LIN_Wakeup_Signal_Check(void);                          
 
 extern ebool ABORT_Error_Check(void);                                
 extern ebool Communication_Status_Check(void);                       
 extern void LIN_Wakeup_Master(void);                                 
 extern uint8 get_LINID(void);                                        
 extern uint8 get_LIN_Data_Length(void);                              
 extern uint16 get_LIN_BAUD(void);                                    
 
 extern void Diagnosis(uint8 *Buff);
 
 
 
 
 
#line 10 "..\User\source\Hardware\LIN.c" /0
 
  
#line 1 "..\User\include\FLASH.h" /0
 









 
 
 
 
 
  
#line 1 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_Type.h" /0
 





 

 
 
 
 
#line 13 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_Type.h" /1
  
 
  
  
  
 
  
  
  
 
 
 
 
 
 
 
 
 
 
 
 
#line 16 "..\User\include\FLASH.h" /0
#line 16 "..\User\include\FLASH.h" /0
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 typedef struct
 {
 uint8 Save_Diagnostic_flag : 2;  
 uint8 Save_Maxpostflag : 2;      
 uint8 Save_Lastpostflag : 2;     
 uint8 : 2;                       
 uint8 MAX_FlashCont;             
 uint8 POS_FlashCont;             
 uint8 Diagnostic_Cont;           
 uint16 Post_Max;                 
 uint16 Post_LAST;                
 } POST_TypeDef;
 
 typedef struct
 {
 uint8 NAD;                   
 uint8 Hardware_Version;      
 uint8 Low_Torque;            
 uint8 Rated_Torque;          
 uint8 Boost0;                
 uint8 Boost1;                
 uint8 Stalled_Angle;         
 uint8 Fault_Boundary_Angle;  
 uint8 Open_Ratio_Angle;      
 uint8 Test_Mode;             
 uint8 CW_CCW;                
 uint8 Voltage_Lowtime;       
 uint8 Voltage_Hightime;      
 uint8 Car_model;             
 uint8 GAC_Number;            
 uint8 Reserved;              
 } Diagnostic;                  
 
 extern Diagnostic Diagnostic_Data;  
 extern POST_TypeDef xdata Fla_Post;
 
 extern uint16 Read_Maxpost(void);
 extern uint16 Read_Lastpost(void);
 extern void Save_Maxpost(uint16 post);
 extern void Save_Lastpost(uint16 post);
 
 extern void Read_Diagnostic(void);
 extern void Save_Diagnostic(void);
 
 extern void Save_DATA(void);
 
#line 11 "..\User\source\Hardware\LIN.c" /0
 
  
#line 1 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_MCU.h" /0









 
 
 
 
 
 
  
#line 1 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_Type.h" /0
 





 

 
 
 
 
#line 13 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_Type.h" /1
  
 
  
  
  
 
  
  
  
 
 
 
 
 
 
 
 
 
 
 
 
#line 16 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_MCU.h" /0
#line 16 "..\FU68xx_Hardware_Driver\Include\FU68xx_4_MCU.h" /0
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr16   DPTR                           = 0x82;                                  
 sfr     PSW                            = 0xd0;                                  
 sbit    CY                                       = PSW ^ 7;                     
 sbit    AC                                       = PSW ^ 6;                     
 sbit    F0                                       = PSW ^ 5;                     
 sbit    RS1                                      = PSW ^ 4;                     
 sbit    RS0                                      = PSW ^ 3;                     
 sbit    OV                                       = PSW ^ 2;                     
 sbit    F1                                       = PSW ^ 1;                     
 sbit    P                                        = PSW ^ 0;                     
 
 sfr     ACC                            = 0xe0;                                  
 
 sfr     RST_SR                         = 0xc9;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     TCON                           = 0x88;                                  
 sbit    TSDIF                                    = TCON ^ 5;                    
 sbit    IT11                                     = TCON ^ 4;                    
 sbit    IT10                                     = TCON ^ 3;                    
 sbit    IF0                                      = TCON ^ 2;                    
 sbit    IT01                                     = TCON ^ 1;                    
 sbit    IT00                                     = TCON ^ 0;                    
 
 sfr     IE                             = 0xa8;                                  
 sbit    EA                                       = IE ^ 7;                      
 sbit    RTCIE                                    = IE ^ 6;                      
 sbit    ES0                                      = IE ^ 4;                      
 sbit    SPIIE                                    = IE ^ 3;                      
 sbit    EX1                                      = IE ^ 2;                      
 sbit    TSDIE                                    = IE ^ 1;                      
 sbit    EX0                                      = IE ^ 0;                      
 
 sfr     IP0                            = 0xb8;                                  
 sbit    PDRV1                                    = IP0 ^ 7;                     
 sbit    PDRV0                                    = IP0 ^ 6;                     
 sbit    PX11                                     = IP0 ^ 5;                     
 sbit    PX10                                     = IP0 ^ 4;                     
 sbit    PX01                                     = IP0 ^ 3;                     
 sbit    PX00                                     = IP0 ^ 2;                     
 sbit    PLVW1                                    = IP0 ^ 1;                     
 sbit    PLVW0                                    = IP0 ^ 0;                     
 
 sfr     IP1                            = 0xc0;                                  
 sbit    PCMP1                                    = IP1 ^ 7;                     
 sbit    PCMP0                                    = IP1 ^ 6;                     
 sbit    PADC1                                    = IP1 ^ 5;                     
 sbit    PADC0                                    = IP1 ^ 4;                     
 sbit    PTIM11                                   = IP1 ^ 3;                     
 sbit    PTIM10                                   = IP1 ^ 2;                     
 sbit    PTIM21                                   = IP1 ^ 1;                     
 sbit    PTIM20                                   = IP1 ^ 0;                     
 
 sfr     IP2                            = 0xc8;                                  
 sbit    PTIM41                                   = IP2 ^ 7;                     
 sbit    PTIM40                                   = IP2 ^ 6;                     
 sbit    PSYSTICK1                                = IP2 ^ 5;                     
 sbit    PSYSTICK0                                = IP2 ^ 4;                     
 sbit    PTIM31                                   = IP2 ^ 3;                     
 sbit    PTIM30                                   = IP2 ^ 2;                     
 sbit    PRTC1                                    = IP2 ^ 1;                     
 sbit    PRTC0                                    = IP2 ^ 0;                     
 
 sfr     IP3                            = 0xd8;                                  
 sbit    PDMA1                                    = IP3 ^ 7;                     
 sbit    PDMA0                                    = IP3 ^ 6;                     
 sbit    PSPI_UT21                                = IP3 ^ 5;                     
 sbit    PSPI_UT20                                = IP3 ^ 4;                     
 sbit    PI2C_UT11                                = IP3 ^ 3;                     
 sbit    PI2C_UT10                                = IP3 ^ 2;                     
 sbit    PCMP31                                   = IP3 ^ 1;                     
 sbit    PCMP30                                   = IP3 ^ 0;                     
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     UT_CR                          = 0x98;                                  
 sbit    UT_MOD1                                  = UT_CR ^ 7;                   
 sbit    UT_MOD0                                  = UT_CR ^ 6;                   
 sbit    SM2                                      = UT_CR ^ 5;                   
 sbit    REN                                      = UT_CR ^ 4;                   
 sbit    TB8                                      = UT_CR ^ 3;                   
 sbit    RB8                                      = UT_CR ^ 2;                   
 sbit    TI                                       = UT_CR ^ 1;                   
 sbit    RI                                       = UT_CR ^ 0;                   
 
 sfr     UT_DR                          = 0x99;                                  
 
 sfr16   UT_BAUD                        = 0x9a;                                  
 
 
 sfr     UT2_CR                         = 0x8a;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     UT2_DR                         = 0x89;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     MDU_CR                         = 0xc1;                                  
 
 
 
 
 sfr     MDU_MD                         = 0xca;                                  
 
 
 
 
 sfr16   MDU_A                          = 0xc6;                                  
 sfr16   MDU_B                          = 0xc4;                                  
 sfr16   MDU_C                          = 0xc2;                                  
 sfr     MDU_D                          = 0xcb;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     PI_CR                          = 0xf9;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     TIM2_CR0                       = 0xa1;                                  
 
 
 
 
 
 
 
 
 
 sfr     TIM2_CR1                       = 0xa9;                                  
 
 
 
 
 
 
 
 
 
 sfr16   TIM2__DR                       = 0xac;                                  
 sfr16   TIM2__ARR                      = 0xae;                                  
 sfr16   TIM2__CNTR                     = 0xaa;                                  
 
 sfr     TIM3_CR0                       = 0x9c;                                  
 
 
 
 
 
 
 
 
 sfr     TIM3_CR1                       = 0x9d;                                  
 
 
 
 
 
 
 
 
 
 sfr16   TIM3__DR                       = 0xa4;                                  
 sfr16   TIM3__ARR                      = 0xa6;                                  
 sfr16   TIM3__CNTR                     = 0xa2;                                  
 
 sfr     TIM4_CR0                       = 0x9e;                                  
 
 
 
 
 
 
 
 
 sfr     TIM4_CR1                       = 0x9f;                                  
 
 
 
 
 
 
 
 
 
 sfr16   TIM4__DR                       = 0x94;                                  
 sfr16   TIM4__ARR                      = 0x96;                                  
 sfr16   TIM4__CNTR                     = 0x92;                                  
 
 
 
 sfr     DRV_OUT                        = 0xf8;                                  
 sbit    MOE                                      = DRV_OUT ^ 7;                 
 sbit    OISWL                                    = DRV_OUT ^ 5;                 
 sbit    OISWH                                    = DRV_OUT ^ 4;                 
 sbit    OISVL                                    = DRV_OUT ^ 3;                 
 sbit    OISVH                                    = DRV_OUT ^ 2;                 
 sbit    OISUL                                    = DRV_OUT ^ 1;                 
 sbit    OISUH                                    = DRV_OUT ^ 0;                 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     P0                             = 0x80;                                  
 sbit    GP00                                     = P0 ^ 0;
 sbit    GP01                                     = P0 ^ 1;
 sbit    GP02                                     = P0 ^ 2;
 sbit    GP03                                     = P0 ^ 3;
 sbit    GP04                                     = P0 ^ 4;
 sbit    GP05                                     = P0 ^ 5;
 sbit    GP06                                     = P0 ^ 6;
 sbit    GP07                                     = P0 ^ 7;
 
 sfr     P1                             = 0x90;                                  
 sbit    GP10                                     = P1 ^ 0;
 sbit    GP11                                     = P1 ^ 1;
 sbit    GP12                                     = P1 ^ 2;
 sbit    GP13                                     = P1 ^ 3;
 sbit    GP14                                     = P1 ^ 4;
 sbit    GP15                                     = P1 ^ 5;
 sbit    GP16                                     = P1 ^ 6;
 sbit    GP17                                     = P1 ^ 7;
 
 sfr     P2                             = 0xa0;                                  
 sbit    GP20                                     = P2 ^ 0;
 sbit    GP21                                     = P2 ^ 1;
 sbit    GP22                                     = P2 ^ 2;
 sbit    GP23                                     = P2 ^ 3;
 sbit    GP24                                     = P2 ^ 4;
 sbit    GP25                                     = P2 ^ 5;
 sbit    GP26                                     = P2 ^ 6;
 sbit    GP27                                     = P2 ^ 7;
 
 sfr     P3                             = 0xb0;                                  
 sbit    GP30                                     = P3 ^ 0;
 sbit    GP31                                     = P3 ^ 1;
 sbit    GP32                                     = P3 ^ 2;
 sbit    GP33                                     = P3 ^ 3;
 sbit    GP34                                     = P3 ^ 4;
 sbit    GP35                                     = P3 ^ 5;
 sbit    GP36                                     = P3 ^ 6;
 sbit    GP37                                     = P3 ^ 7;
 
 sfr     P4                             = 0xe8;                                  
 sbit    GP42                                     = P4 ^ 2;
 sbit    GP43                                     = P4 ^ 3;
 sbit    GP44                                     = P4 ^ 4;
 sbit    GP45                                     = P4 ^ 5;
 
 sfr     P0_OE                          = 0xfc;                                  
 
 
 
 
 
 
 
 
 
 
 sfr     P1_IE                          = 0xd1;                                  
 sfr     P1_IF                          = 0xd2;                                  
 sfr     P1_OE                          = 0xfd;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     P2_IE                          = 0xd3;                                  
 sfr     P2_IF                          = 0xd4;                                  
 sfr     P2_OE                          = 0xfe;                                  
 
 
 
 
 
 
 
 
 
 
 
 sfr     P3_OE                          = 0xff;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     P4_OE                          = 0xe9;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     CMP_CR0                        = 0xd5;                                  
 
 
 
 
 
 
 
 
 
 sfr     CMP_CR1                        = 0xd6;                                  
 
 
 
 
 
 
 
 
 
 sfr     CMP_CR2                        = 0xda;                                  
 
 
 
 
 
 
 
 
 
 sfr     CMP_CR3                        = 0xdc;                                  
 
 
 
 
 
 
 
 
 
 sfr     CMP_CR4                        = 0xe1;                                  
 
 
 
 
 sfr     CMP_SR                         = 0xd7;                                  
 
 
 
 
 
 
 
 
 
 sfr     EVT_FILT                       = 0xd9;                                  
 
 
 
 
 
 
 
 
 sfr     FLA_KEY                        = 0x84;                                  
 
 
 
 sfr     FLA_CR                         = 0x85;                                  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 sfr     PCON                           = 0x87;                                  
 
 
 
 
 
 
 
 sfr     LVSR                           = 0xdb;                                  
 
 
 
 
 
 
 
 
 
#line 12 "..\User\source\Hardware\LIN.c" /0
 
 
 void Inquire_ID(uint8 PCI, uint8 DID);
 void Maste_Control(uint8 PCI, uint8 DID, uint8 POST);
 void Read_Version(uint8 PCI, uint16 DID);
 
 void Authentication_mode(uint8 PCI, uint8 DID);
 void AKey_mode(uint8 PCI, uint8 DID);
 void Authentication_delay(void);
 void Change_NAD(uint8 PCI, uint8 DID, uint8 NAD);
 void Change_AGS(uint8 PCI, uint8 DID, uint8 Cdata);
 void Quit_Authentication(uint8 PCI, uint8 DIDH, uint8 DIDL);
 
 
 
 
 Safety_Verification Safety;  
 uint16 Security_time;        
 LIN_Diagnosis Maste_Data;
 LIN_Diagnosis AGS_ReplyData;  
 
 
 uint8 AGS_New_NAD = 0;
 uint8 xdata ucaLinBuff[8] =
 {
 0x68, 0x04, 0x12, 0x35, 0x79, 0xab, 0xcd, 0xef};






 
 void SetIRQ_LIN(ebool eIRQ, eType_LIN_IRQ eIP)
 {
  ((*(volatile uint8 xdata *)0x40e0) = (*(volatile uint8 xdata *)0x40e0) & (~(0x08)) | (eIRQ ? 0x08 : 0));
 
 if (eIRQ)
 {
  ((IP3) = (IP3) & (~(PSPI_UT21 | PSPI_UT20)) | (eIP));
 }
 }
 





 
 void Verify_Mode_Configuration(eType_LIN_CHKMOD eCHKMOD)
 {
  ((*(volatile uint8 xdata *)0x40e0) = (*(volatile uint8 xdata *)0x40e0) & (~(0x04)) | (eCHKMOD));
 }
 





 
 void Choose_LINRW(eType_LIN_LINRW eLINRW)
 {
  ((*(volatile uint8 xdata *)0x40e0) = (*(volatile uint8 xdata *)0x40e0) & (~(0x02)) | (eLINRW));
 }
 





 
 void Using_AUTOSIZE(eType_LIN_AUTOSIZE eAUTOSIZE)
 {
  ((*(volatile uint8 xdata *)0x40e0) = (*(volatile uint8 xdata *)0x40e0) & (~(0x01)) | (eAUTOSIZE));
 }
 





 
 void LINEN_Control(eType_LIN_LINEN eLINEN)
 {
  ((*(volatile uint8 xdata *)0x40e2) = (*(volatile uint8 xdata *)0x40e2) & (~(0x01)) | (eLINEN));
 }
 





 
 ebool LIN_Enable_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e2) & (0x01)) == (0x01));
 }
 
 
 





 
 ebool LINREQ_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x01)) == (0x01));
 }
 





 
 void set_LIN_Data_Length(uint8 eLength)
 {
  *(volatile uint8 xdata *)0x40e4 = eLength;
 }
 





 
 ebool Transfer_Complete_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x02)) == (0x02));
 }
 





 
 ebool LIN_Error_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e2) & (0x10)) == (0x10));
 }
 





 
 ebool Sync_Error_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x80)) == (0x80));
 }
 





 
 ebool Data_Error_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x40)) == (0x40));
 }
 





 
 ebool ID_Error_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x20)) == (0x20));
 }
 





 
 void LIN_Error_Handing(void)
 {
 if (Sync_Error_Check())  
 {
 ;
 }
 else if (Data_Error_Check())  
 {
 ;
 }
 else if (ID_Error_Check())  
 {
 ;
 }
 }
 





 
 ebool Bus_Time_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x04)) == (0x04));
 }
 





 
 ebool LIN_Sleep_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e2) & (0x20)) == (0x20));
 }
 





 
 ebool LIN_Wakeup_Signal_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e2) & (0x08)) == (0x08));
 }
 





 
 ebool ABORT_Error_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x10)) == (0x10));
 }
 





 
 ebool Communication_Status_Check(void)
 {
 return (((*(volatile uint8 xdata *)0x40e1) & (0x08)) == (0x08));
 }
 





 
 void LIN_Wakeup_Master(void)
 {
 if (LIN_Sleep_Check())
 {
   ((*(volatile uint8 xdata *)0x40e2) |= (0x08));
 }
 }
 





 
 uint8 get_LINID(void)
 {
 return *(volatile const uint8 xdata *)0x40e3;
 }
 





 
 uint8 get_LIN_Data_Length(void)
 {
 return *(volatile uint8 xdata *)0x40e4;
 }
 





 
 uint16 get_LIN_BAUD(void)
 {
 return *(volatile const uint16 xdata *)0x40e6;
 }
 







 
 void Sleep_Order_2Type_ID_0X1F(void)
 {
 if (*(volatile const uint8 xdata *)0x40e3 == 0x1F)  
 {
 Verify_Mode_Configuration(0);
 Choose_LINRW(0);
   ((*(volatile uint8 xdata *)0x40e2) |= (0x04));  
 }
 }
 






 
 void Diagnosis(uint8 *Buff)  
 {
 if (Safety.Time == 0)
 {
 Safety.Falg = 0;  
 }
 
 if (Buff[0] == Maste_Data.NAD)
 {
 Maste_Data.PCI = Buff[1];
 Maste_Data.SID = Buff[2];
 
 if (Maste_Data.SID == 0x22)  
 {
 Maste_Data.DIDL = Buff[4];
 Read_Version(Maste_Data.PCI, Maste_Data.DIDL);
 }
 else if (Maste_Data.SID == 0x2F)  
 {
 Safety.Time = 2000;
 
 Maste_Data.DIDL = Buff[3];
 Maste_Control(Maste_Data.PCI, Maste_Data.DIDL, Buff[5]);
 }
 else if (Maste_Data.SID == 0xB2)  
 {
 Safety.Time = 2000;
 if ((Buff[3] == 0x00) && (Buff[4] == 0xff) && (Buff[5] == 0x7f) && (Buff[6] == 0xff) && (Buff[7] == 0xff))
 {
 Inquire_ID(Maste_Data.PCI, Maste_Data.SID);
 }
 else
 {
 Maste_Data.SID = 0XFE;  
 Inquire_ID(Maste_Data.PCI, Maste_Data.SID);
 }
 }
 else if (Maste_Data.SID == 0x10)  
 {
 Maste_Data.DIDL = Buff[3];
 Authentication_mode(Maste_Data.PCI, Maste_Data.DIDL);
 }
 else if (Maste_Data.SID == 0x27)  
 {
 Safety.Time = 2000;
 Maste_Data.DIDL = Buff[3];
 if ((Buff[4] == 0x00) && (Buff[5] == 0x11) && (Buff[6] == 0x22) && (Buff[7] == 0x33))
 {
 AKey_mode(Maste_Data.PCI, Maste_Data.DIDL);
 }
 else
 {
 Maste_Data.DIDL = 0Xff;  
 AKey_mode(Maste_Data.PCI, Maste_Data.DIDL);
 }
 }
 else if (Maste_Data.SID == 0x3E)  
 {
 if ((Maste_Data.PCI == 0x02) && (Buff[3] == 0x00))
 {
 Authentication_delay();  
 }
 }
 else if (Maste_Data.SID == 0xB1)  
 {
 Safety.Time = 2000;
 Maste_Data.DIDL = Buff[3];
 Change_NAD(Maste_Data.PCI, Maste_Data.SID, Buff[7]);  
 }
 else if (Maste_Data.SID == 0x2E)  
 {
 Safety.Time = 2000;
 Maste_Data.DIDL = Buff[4];
 Change_AGS(Maste_Data.PCI, Maste_Data.DIDL, Buff[5]);
 }
 else if (Maste_Data.SID == 0xB2)  
 {
 Maste_Data.DIDH = Buff[3];
 Maste_Data.DIDL = Buff[3];
 Quit_Authentication(Maste_Data.PCI, Maste_Data.DIDH, Maste_Data.DIDL);
 }
 }
 }
 
 
 
 
 
 
 
 
 char *Part_version = "7607034005";  
 




 
 void Read_Version(uint8 PCI, uint16 DID)
 {
 if (PCI != 0X03)  
 {
 DID = 0xff;   
 }
 AGS_ReplyData.Pack = 1;       
 AGS_ReplyData.NAD = 0x61;  
 switch (DID)
 {
 case 0x21:                     
 AGS_ReplyData.PCI = 0x06;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0X21;  
 AGS_ReplyData.DATA[0] = 0x22;
 AGS_ReplyData.DATA[1] = (0x8A43 >> 8) & 0xff;
 AGS_ReplyData.DATA[2] = 0x8A43 & 0xff;
 break;
 
 case 0x22:                     
 AGS_ReplyData.PCI = 0x06;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x22;  
 AGS_ReplyData.DATA[0] = 0x20;
 AGS_ReplyData.DATA[1] = (0x8A43 >> 8) & 0xff;
 AGS_ReplyData.DATA[2] = 0x8A43 & 0xff;
 break;
 
 case 0x24:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x24;
 AGS_ReplyData.DATA[0] = 0x50;
 break;
 
 case 0x25:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;  
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x25;
 AGS_ReplyData.DATA[0] = 0x55;
 break;
 
 case 0x26:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x26;
 AGS_ReplyData.DATA[0] = 0x88;
 break;
 
 case 0x28:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x28;
 AGS_ReplyData.DATA[0] = 0x02;
 break;
 
 case 0x29:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x29;
 AGS_ReplyData.DATA[0] = 0x14;
 break;
 
 case 0x2A:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x2a;
 AGS_ReplyData.DATA[0] = 0x5a;
 break;
 
 case 0x2B:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x2b;
 AGS_ReplyData.DATA[0] = 0x00;
 break;
 case 0x2D:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x2d;
 AGS_ReplyData.DATA[0] = 0x04;
 break;
 case 0x2E:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x2e;
 AGS_ReplyData.DATA[0] = 0x01;
 break;
 case 0x31:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x31;
 AGS_ReplyData.DATA[0] = 0x07;
 break;
 case 0x32:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x62;  
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x32;
 AGS_ReplyData.DATA[0] = 0x04;
 break;
 case 0x35:                     
 AGS_ReplyData.PCI = 0x06;  
 AGS_ReplyData.SID = 0x62;  
 AGS_ReplyData.DIDH = 0x00;
 AGS_ReplyData.DIDL = 0x35;
 AGS_ReplyData.DATA[0] = Part_version[0];
 AGS_ReplyData.DATA[1] = Part_version[1];
 AGS_ReplyData.DATA[2] = Part_version[2];
 AGS_ReplyData.DATA[3] = Part_version[3];
 AGS_ReplyData.DATA[4] = Part_version[4];
 AGS_ReplyData.DATA[5] = Part_version[5];
 AGS_ReplyData.DATA[6] = Part_version[6];
 AGS_ReplyData.DATA[7] = Part_version[7];
 AGS_ReplyData.DATA[8] = Part_version[8];
 AGS_ReplyData.DATA[9] = Part_version[9];
 AGS_ReplyData.Pack = 3;  
 break;
 
 case 0xff:                     
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;  
 AGS_ReplyData.DIDH = 0xb2;
 AGS_ReplyData.DIDL = 0x13;
 break;
 
 default:
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;  
 AGS_ReplyData.DIDH = 0xb2;
 AGS_ReplyData.DIDL = 0x11;  
 break;
 }
 }
 




 
 void Maste_Control(uint8 PCI, uint8 DID, uint8 POST)
 {
 if (PCI != 0X04)  
 {
 DID = 0xff;
 }
 if (PCI != 0X04)  
 {
 DID = 0xfe;
 }
 if (POST > 0X64)  
 {
 DID = 0xfc;
 }
 
 AGS_ReplyData.Pack = 1;       
 AGS_ReplyData.NAD = 0x61;  
 switch (DID)
 {
 case 0x2F:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0x6F;
 AGS_ReplyData.DIDH = 0x0D;
 AGS_ReplyData.DIDL = 0X03;     
 AGS_ReplyData.DATA[0] = 0x22;  
 break;
 
 case 0xFC:                     
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0x2F;
 AGS_ReplyData.DIDL = 0x31;  
 break;
 
 case 0xFE:                     
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0x2F;
 AGS_ReplyData.DIDL = 0x22;  
 break;
 
 case 0xFF:                     
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0x2F;
 AGS_ReplyData.DIDL = 0x13;  
 break;
 
 default:
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0x2F;
 AGS_ReplyData.DIDL = 0x11;  
 break;
 }
 }




 
 
 void Inquire_ID(uint8 PCI, uint8 DID)
 {
 if (PCI != 0X06)  
 {
 DID = 0xff;
 }
 
 AGS_ReplyData.Pack = 1;       
 AGS_ReplyData.NAD = 0x61;  
 switch (DID)
 {
 case 0xB2:                     
 AGS_ReplyData.PCI = 0x04;  
 AGS_ReplyData.SID = 0xF2;
 AGS_ReplyData.DIDH = 0x8A43 & 0xff;
 AGS_ReplyData.DIDL = (0x8A43 >> 8) & 0xff;  
 AGS_ReplyData.DATA[0] = 0x8A43 & 0xff;
 AGS_ReplyData.DATA[1] = (0x8A43 >> 8) & 0xff;  
 AGS_ReplyData.DATA[2] = 0xFF & 0xff;
 break;
 
 case 0xFE:  
 
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xB2;
 AGS_ReplyData.DIDL = 0X11;
 break;
 
 case 0xFF:                     
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xB2;
 AGS_ReplyData.DIDL = 0x13;
 break;
 }
 }
 




 
 void Authentication_mode(uint8 PCI, uint8 DID)
 {
 AGS_ReplyData.NAD = 0x61;  
 if ((PCI == 0x02) && (DID == 0x03))
 {
 AGS_ReplyData.PCI = 0x02;  
 AGS_ReplyData.SID = 0x50;  
 AGS_ReplyData.DIDH = 0x03;
 Safety.Falg = 1;
 }
 else
 {
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7F;  
 AGS_ReplyData.DIDH = 0x10;
 AGS_ReplyData.DIDL = 0x03;
 }
 }




 
 void AKey_mode(uint8 PCI, uint8 DID)
 {
 AGS_ReplyData.NAD = 0x61;  
 if ((PCI == 0x06) && (DID == 0x01) && (Safety.Falg == 1))
 {
 AGS_ReplyData.PCI = 0x02;  
 AGS_ReplyData.SID = 0x50;  
 AGS_ReplyData.DIDH = 0x03;
 Safety.Falg = 2;
 }
 else
 {
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7F;  
 AGS_ReplyData.DIDH = 0x27;
 AGS_ReplyData.DIDL = 0x01;
 Safety.Falg = 0;
 Safety.Time = 0;
 }
 }




 
 void Authentication_delay(void)
 {
 if (Safety.Falg == 2)
 {
 Safety.Time = 2000;  
 }
 }
 




 
 void Change_NAD(uint8 PCI, uint8 DID, uint8 NAD)
 {
 
 if (PCI != 0X06)
 {
 DID = 0xFF;  
 }
 else if (Safety.Falg != 2)
 {
 DID = 0xFE;  
 }
 else if (AGS_New_NAD == NAD)
 {
 DID = 0xFD;  
 }
 else  
 {
 AGS_New_NAD = NAD;
 DID = 01;
 }



 
 
 AGS_ReplyData.NAD = 0x61;  
 
 switch (DID)
 {
 case 0x01:                     
 AGS_ReplyData.PCI = 0x01;  
 AGS_ReplyData.SID = 0xF1;  
 break;
 
 case 0xFD:  
 AGS_ReplyData.PCI = 0x03;
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xB1;
 AGS_ReplyData.DIDL = 0x11;
 break;
 case 0xFE:  
 AGS_ReplyData.PCI = 0x03;
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xB1;
 AGS_ReplyData.DIDL = 0x10;
 break;
 
 case 0xFF:  
 AGS_ReplyData.PCI = 0x03;
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xB1;
 AGS_ReplyData.DIDL = 0x13;
 break;
 }
 }
 




 
 void Change_AGS(uint8 PCI, uint8 DID, uint8 Cdata)
 {
 
 AGS_ReplyData.NAD = 0x61;  
 
 AGS_ReplyData.PCI = 0x04;       
 AGS_ReplyData.SID = 0x6E;       
 AGS_ReplyData.DIDH = 0x00;      
 AGS_ReplyData.DIDL = DID;       
 AGS_ReplyData.DATA[0] = Cdata;  
 if (PCI != 0x04)
 {
 DID = 0xff;
 }
 
 switch (DID)
 {
 case 0x22:                                     
 Diagnostic_Data.Hardware_Version = Cdata;  
 break;
 
 case 0x24:
 Diagnostic_Data.Low_Torque = Cdata;  
 break;
 
 case 0x25:
 Diagnostic_Data.Rated_Torque = Cdata;  
 break;
 
 case 0x26:
 Diagnostic_Data.Boost0 = Cdata;  
 break;
 
 case 0x27:                           
 Diagnostic_Data.Boost1 = Cdata;  
 break;
 
 case 0x28:
 Diagnostic_Data.Stalled_Angle = Cdata;  
 break;
 
 case 0x29:
 Diagnostic_Data.Fault_Boundary_Angle = Cdata;  
 break;
 
 case 0x2A:
 Diagnostic_Data.Open_Ratio_Angle = Cdata;  
 break;
 
 case 0x2B:
 Diagnostic_Data.Test_Mode = Cdata;  
 break;
 
 case 0x2E:
 Diagnostic_Data.CW_CCW = Cdata;  
 break;
 
 case 0x31:
 Diagnostic_Data.Voltage_Lowtime = Cdata;  
 break;
 
 case 0x32:
 Diagnostic_Data.Voltage_Hightime = Cdata;  
 break;
 
 case 0x33:
 Diagnostic_Data.Car_model = Cdata;  
 break;
 
 case 0x34:
 Diagnostic_Data.GAC_Number = Cdata;  
 break;
 
 case 0xEE:
 Diagnostic_Data.NAD = AGS_New_NAD;
 Fla_Post.Save_Diagnostic_flag = 1;
 break;
 
 default:  
 AGS_ReplyData.PCI = 0x03;
 AGS_ReplyData.SID = 0x7f;
 AGS_ReplyData.DIDH = 0xBE;
 if (PCI != 0x04)
 {
 AGS_ReplyData.DIDL = 0x13;  
 }
 else
 {
 AGS_ReplyData.DIDL = 0x11;  
 }
 break;
 }
 }
 
 




 
 void Quit_Authentication(uint8 PCI, uint8 DIDH, uint8 DIDL)
 {
 
 if ((PCI == 0x06) && (DIDH == 0x0D) && (DIDL == 0x00))
 {
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x6F;  
 AGS_ReplyData.DIDH = 0x0D;
 Safety.Falg = 0;
 
 Fla_Post.Save_Diagnostic_flag = 1;
 Diagnostic_Data.NAD = AGS_New_NAD;  
 }
 else
 {
 AGS_ReplyData.PCI = 0x03;  
 AGS_ReplyData.SID = 0x7F;  
 AGS_ReplyData.DIDH = 0x2F;
 if (PCI != 0X06)
 {
 AGS_ReplyData.DIDL = 0x13;
 }
 else
 {
 AGS_ReplyData.DIDL = 0x11;
 }
 }
 }
